(a) Field of the invention
The present invention relates to a method of making a semiconductor integrated circuit, and more particularly it pertains to a semiconductor integrated circuit comprising a static induction transistor (hereinafter referred to briefly as SIT) and an insulated-gate type field effect transistor (hereinafter referred to as IG-FET).
(b) Description of the prior art
Semiconductor integrated circuits which are called generally IC usually employ, as an active semiconductor device, a bipolar transistor or an IG-FET. With the recent development of SITs having new characteristics, attention is now being paid to an IC having, incorporated therein, either a junction type SIT or an IG(MOS) SIT so as to positively utilize the excellent characteristics of such devices. ICs are now used in electronic apparatuses in various technical fields, and there are formed various types of circuit arrangements so as to meet the specific use of the respective electronic apparatuses. In such integrated circuits, the points to which a keen interest is being placed and which are being studied at present are the following two, i.e. one of which concerns the improvement of packing density and the other concerns the improvement of operation speed. The former represents the efforts to pack or integrate as many semiconductor devices as possible per unit area, and the importance of this former point increases further as the scale of integration increases up to what is generally called LSI (Large Scale Integration) and further to VLSI (Very Large Scale Integration). This packing density is a factor which, when an IC is used as a memory device, governs the feasibility of the largeness in capacity of a memory device. The latter, i.e. the operation speed, in the other hand, is related to the operationability at higher speed, and in case an IC is used as a logic circuit, the operation speed of the semiconductor device will become the factor for the control of the velocity of the logic operation.
As discussed above, in an IC, the materialization of a higher packing density and a higher operation speed constitutes a very important task, and in particular, in a logic circuit including a memory, these factors will assume the most critical tasks requiring attainment. In the past, however, there has hardly been accomplished such IC as is capable of satisfying these two features at the same time.
Generally speaking, when comparison is made between a bipolar transistor type IC and a MOS FET type IC, it has been accepted widely that the former, i.e. the bipolar transistor type IC, is superior in the speed of operation, and that, with respect to such aspects as power dissipation and packing density (accordingly, for example, a large capacity memory), MOS-IC is superior. However, since "SIT" has come to fore, new circuit arrangement utilizing the unique characteristic of SIT has become possible. Accordingly, it has since then become difficult to determine the superiority of ICs only through the comparison of the above-mentioned two types of ICs, and there has arisen the necessity for a review of this matter. Based on the foregoing consideration, a brief comparison will hereunder be made between a MOS-FET type IC and an SIT type IC.
An IG(MOS) FET type IC as can be represented typically by, for example, MOS-LSI can have a high packing density as stated above, but owing to its high dependency on its layout, its operation speed is not necessarily high. On the other hand, an IC which is represented typically by SITL (SIT logic) allows the display of the unique characteristic of SIT, and even when compared with a bipolar transistor type IC, its operation speed is much higher, and in addition, the packing density can be made high to a certain extent. However, when this SITL is viewed as a logic circuit, there have been the instances wherein the packing density of the SITL is poor as compared with an IG(MOS) FET type IC having a dynamic logic arrangement, because the logic arrangement of SITL is static in nature.